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CARP Project

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Project Outlines

  • FreeRTOS-support for RV32I Core Project
  • CARP Core ISA
  • General Accelrator Renderer(GAR)

Resources and Guides

  • CARP Videos
  • ASIC Tools Setup and Guides
  • ASIC Class Slides
  • RISC-V References
    • CARP Core ISA
    • RISC-V Software Resources
    • RISC-V Privileged Architecture Manual
    • RISC-V Privileged ISA Manual
    • EEL Hazard Report
  • Presenter Slides
    • Arm vs x86 Architecture Slides
    • Intro to Computer Architecture Slides
    • Intro to ASIC Slides
    • Intro to FIFO and uArch Challenge Slides
    • BIST Slides
    • Intro to ASIC Formal Verification Slides
    • Timing Guides
      • Constraints Presentation by Henry Evans
      • STA Presentation by Henry Evans

Meetings

  • Original Meetings
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Intro to FIFO and uArch Challenge Slides¶

View the Alex Wong’s Intro to FIFO and uArch Challenge (PDF)

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